A complementary metal-oxide-semiconductor (CMOS) image sensor (CIS) generally utilizes a series of photodiodes formed within an array of pixel regions of a semiconductor substrate in order to sense when light has impacted the photodiode. Adjacent to each of the photodiodes within each of the pixel regions, a transfer transistor such as a field-effect transistor (FET) may be formed in order to transfer the signal generated by the sensed light within the photodiode at a desired time. Such photodiodes and transfer transistors allow for an image to be captured at a desired time by operating the transfer transistor at the desired time.
The conventional CIS may be formed in either a front side illumination (FSI) configuration or a back-side illumination (BSI) configuration. In either case, the CIS often includes one or more through silicon vias (TSVs) formed from, for example, copper (Cu). Unfortunately, these TSVs may generate high stress, which undesirably impacts the performance of the FET within the CIS.
In addition to the above, the process of manufacturing the conventional CIS device often includes aligning one device relative to another. The alignment process is typically performed using an infrared (IR) wavelength because silicon (Si) has a low transparency with short wavelengths.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the embodiments and are not necessarily drawn to scale.